Intel has built an experimental fully programmable 48-core chip that it’s nicknamed the Single-Chip Cloud Computer (SCC) and means to build at least a hundred more to pass out to industry and academic partners to use to develop new software applications and parallel programming models.

Microsoft, ETH Zurich, the University of California at Berkeley and the University of Illinois already have one and researchers from Intel, HP and Yahoo’s Open Cirrus initiative have already begun porting cloud applications to the widget using Hadoop, the Java software framework that supports data-intensive distributed applications.

Internally Intel has ported web servers, physics modeling and financial analytics to the thing.

Intel says SCC, which runs Windows and Linux and so legacy software, is a research platform meant to work out the many kinks of multi-headed programming. It will never be a product.

However, Intel means to start integrating key features of the work in a new line of Core-branded chips early next year and introduce six- and eight-core processors later in 2010.

The SCC dingus – the most x86 engines ever pushed onto a single sliver of silicon – only consumes 25W-125W with all its little cores chugging away at maximum performance.

That’s the equivalent of a couple of light bulbs – or a Nehalem chip – thanks to newly invented fine-grain power management techniques and Intel believes it could reshape how computers are built and how people interact with their PCs and personal devices.

SCC incorporates technologies such as the power management and scale-out message-passing intended to scale to 100 cores and beyond but before such a device can go mainstream Intel’s got to understand better how to schedule and coordinate many cores.

Once that problem’s linked it believes laptops will be able to see objects and motion as it happens the same way a human being does and with a high degree of accuracy.

It says to imagine a world without keyboards, remote controls or joysticks because computers may be able to read brain waves, so simply thinking about a command, such as dictating words, would happen without speaking.

Or, if you figure you’ll be dead before that happens, imagine shopping online and seeing a “mirror” of yourself wearing the clothes you’re interested in and twirling to see how the fabric drapes and checking if the color complements your skin tone.

Very Jules Verne and gee-whiz but not any problem Intel is immediately trying to solve. It’s really trying to squeeze a container-based data center Cinderella-style into a rack.

Intel says it calls the futuristic chip a Single-Chip Cloud Computer because architecturally it resembles the organization of data centers used to create a cloud of computing resources over the Internet.

That means tens to thousands of computers connected by a physically cabled network, distributing large tasks and massive datasets in parallel. The chip uses the same approach, but all the computers and networks are integrated on a single piece of 45nm, high-k metal-gate silicon about the size of a postage stamp, dramatically reducing the amount of physical computers needed to create a cloud data center.

There’s a high-speed 256 GB/s network between the cores in the chip that Intel says significantly improves the communications performance and energy efficiency of the current data center model, since data packets only have to move a few millimeters on-chip instead of tens of meters to another computer system.

Applications will be able to use this low-latency mesh network to pass information directly between cooperating cores in microseconds, reducing the need to access data in slower off-chip system memory. Applications can also dynamically manage exactly which cores are used for a given task at a given time.

Each of the cores can run an operating system and Intel says software can turn each of the cores off and on and match their voltage and clock speed levels to the needs of the moment. Each dual core or tile can have its own frequency and groups of four tiles or eight cores can run at their own voltage.

In a canned quote, Dan Reed, Microsoft’s corporate VP of extreme computing, remarked that “Our early research with the single chip cloud computer prototype has already identified many opportunities in intelligent resource management, system software design, programming models and tools, and future application scenarios.”

David Andersen, assistant professor of computer science at Carnegie Mellon, figures “the chip’s massive parallelism gives us the ability to investigate, today, the degree of parallelism that will be needed from applications five years down the line to make the best use of emerging many-core platforms.”

The prototype, an x86 follow-on to the 80-core non-x86 Polaris chip Intel unveiled two years ago, was developed by Intel Labs in Bangalore, India, Braunschweig, Germany and Hillsboro, Oregon as part of the company’s Tera-scale Computing Research Program.

Intel says it will detail the widget’s 24 dual-core or tile architecture and circuits in a paper to be presented at the International Solid State Circuits Conference in February.

Apparently the 1.3 billion-transistor concept chip, as Intel calls it, shares some attributes with Intel’s upcoming Larrabee GPU microarchitecture but not its cache-coherent design.

Tilera has a 100-core chip that it expects to put out next year.